CODEWITHSUNDEEP
cmultithreadingmultiprocessingmulticorex86-64
pythonic
pythonic

Reputation: 21589

How cache coherence affects the performance in this case

Say if core A is modifying a variable X and core B is reading that variable (X). Ofcourse in this case a cache coherence protocol will update the cache of core B, because X has been modified by core A and ofcourse this cache coherence will slowdown execution on core B. However, will this cache coherence also affect the performance of core A, assuming that variable X resides in its cache.

Upvotes: 7

Views: 946

Answers (2)

Phil Miller
Phil Miller

Reputation: 38108

Yes, on present-day microarchitectures using ME(O)SI coherence protocols, it will slow down A's updates to X as well. The reason for this is that B's read will put the cache line containing X into the 'shared' state before copying it, and then A's write will have to invalidate B's copy to enter the 'exclusive' state before it can modify it again.

That all said, A's writes to X might not actually stall A's execution pipeline. This depends on the memory consistency model of the architecture and programming language, and whether the write is forced out as an atomic operation or a subsequent write fence.

Upvotes: 2

Nathan Binkert
Nathan Binkert

Reputation: 9124

Yes. There are several ways that it can affect the performance. The standard protocol that people use is some variant of MSI (Modified, Shared, Invalid) sometimes with O (Owner) and often E (Exclusive) added to the protocol. In your example, core A would start in the Modified (or Exclusive) state, and core B's read would force core A to change it to the Shared state. This action takes up cycles in the cache since there are only so many operations that the core can perform at any given time. The impact of this on Core A isn't very high though since it is not in the critical path. The bigger impact is if Core A does a write again. Since the cache line is in the shared (or invalid) state, it must issue a request to upgrade itself to M or E. That request must go to Core B. This operation is on the critical path and the write can't finish until the cache block is upgraded. That said, writes are generally buffered and the processor will generally not be blocked on this operation.

Upvotes: 4

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