CODEWITHSUNDEEP
c++cc++11atomicc11
user396672
user396672

Reputation: 3166

Does atomic_load() with memory_order_relaxed introduce any additional overhead compared to simple reading from a variable?

I don't see any reason for additional overhead for "native" CPU integrals, but I may be wrong, so I'd want to hear the comunity's opinion

My real problem concerns some kind of linked list that relatively rare changes but is offten read (similar to typical RCU use case). The idea is to provide 2 access modes for readonly operations: the first mode is used if the structure is now changing (full blown lock free algorithm) and the second lightweight mode for "calm" case (with non-atomic list traversal). For the second (lightweight) case I'm going to use atomic loads with memory_order_relaxed, but if it is too expensive, I need to do some workaround (cahche the atomic value in non-atomic variable, or emulate in some way proposed memory_order_nonatomic http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1446.htm , etc.)

I understand that the answer depends on atomics implementation (and CPU), but I hope the implementation should behave reasonably :)

Upvotes: 6

Views: 1501

Answers (1)

Rost
Rost

Reputation: 9089

memory_order_relaxed model just allows store/load operations reordering, but it still enforce atomic reads/writes. On some CPU architectures it will lead to bus locking, cache flushing etc. So generally answer is yes - atomic access with memory_order_relaxed shall be considered as more expensive than non-atomic access.

Upvotes: 5

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