CODEWITHSUNDEEP
microcontrollercode-conversionatmegawinavratmega16
user1811378
user1811378

Reputation: 21

Implementing timer code for Atmega8 into Atmega16

This code snippet is written for Atmega8 taken from clapper circuit using Atmega8. Can anyone convert this code snippet for Atmega16 with a little explanation. As I am trying to implement the same for Atmega16 and having some trouble with the timer part.

#define BURST_TIME  70
#define READY_TIME  150
#define TIME_OUT    300

void timer_init()
{
    TIFR |= (1<<TOV0);      
    //set interrupt on overflow
    TIMSK |= (1<<TOIE0);
    TCNT0 = 223;
}

ISR (TIMER0_OVF_vect)
{       
    TCNT0 = 223;
    timer++;

    if (timer == BURST_TIME)
    {
        burst = 1;
        ready = 0;
    } else if (timer == READY_TIME)
    {
        burst = 0;
        ready = 1;
    } else if (timer == TIME_OUT)
    {
        timer = 0;
        burst = 0;
        ready = 0;
        first = 0;
        stop_timer();
    }
}

void start_timer()
{
    TCCR0 |= (1<<CS02);
}

void stop_timer()
{
    TCCR0 &= ~(1<<CS02);
}

Upvotes: 0

Views: 2992

Answers (1)

derWilly
derWilly

Reputation: 453

Try to use the Atmel Datasheets for the Chips and Compare the Timer Registers, you will find all what you need

Atmega8: http://www.atmel.com/images/doc2486.pdf Useful: Register Summary Page 280

Atmega16: http://www.atmel.com/Images/doc2466.pdf Useful: Register Summary Page 331

You want to use Timer 0, thats an 8-Bit Timer (Page 71 on Atmega16)

Now lets try to analyze the code a bit

TIFR |= (1<<TOV0); // TIFR Thats the Timer/Counter0 Interrupt Flag Register
                   // TOV0: Timer/Counter0 Overflow Flag
                   // The bit TOV0 is set when an overflow occurs in Timer/Counter0.
                   // Datasheet page: 86

TIMSK |= (1<<TOIE0);  // Timer/Counter Interrupt Mask Register
                      // TOIE0: Timer/Counter0 Overflow Interrupt Enable
                      // When the TOIE0 bit is written to one, and the I-bit in the `status Register is set, the
                      // Timer/Counter0 Overflow interrupt is enabled

TCNT0 = 223; // TCNT0:  0 to 255 or 0x00 to 0xFF
             // with each clock it increases by 1
             // when the register hits 255, a Timer-Overflow is triggerd (ISR...)
             // The flag can be queried or used to trigger an interrupt.
             // Datasheet Page 85

TCCR0 |= (1<<CS02); // TCCR0: Timer/Counter Control Register
                    // CS02: Bit 2:0 – CS02:0: Clock Select
                    // This means that your running the Timer with a                               
                    // Prescaler of 256 (CPU frequency / 256)
                    // This line starts the Timer!
                    // Datasheet Page: 85

ISR (TIMER0_OVF_vect) // will be executed when a overflow is triggerd
{ 
    // Do something
    // Keep the execution time short in this section
}

Upvotes: 2

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