ihsoy ih
ihsoy ih

Reputation: 1018

Makefile: Foreach and eval's missing separators?

I have this in my Makefile:

# Build source files
define compile_rule
%.o : %.$1
        $$(COMPILE) $$(COMPILE_FLAGS) $$(CC_FLAGS) -o $$@ $$<
endef
$(foreach EXT, $(SRC_EXT), $(eval $(call compile_rule, $(EXT))))

However if I type make I get this error, why is this happening?

*** missing separator (did you mean TAB instead of 8 spaces?).  Stop.

Upvotes: 2

Views: 814

Answers (1)

pstrjds
pstrjds

Reputation: 17438

You need to use a tab instead of 8 spaces in the line right above the endef.

Upvotes: 3

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