user1906583
user1906583

Reputation: 135

Percentage sign followed by semicolon in makefile prerequisite list - need a simple pointer

I recently browsed through a makefile with these lines of code in a OS design course at CMU.

$(TEST_PROGS) tests/verify_test: %: %.o libtraceback.a
    $(CC) -o $@ [email protected] -L. libtraceback.a $(CFLAGS) $(LDFLAGS) $(LIBS) -static
    python ./symtabgen.py $@

I don't understand what "%:" could mean here. The TEST_PROGS variable contains list traceback/traceback_globals.o traceback/traceback.o

traceback/traceback_globals.o traceback/traceback.o are required in making libtraceback.a

I've went so far as to play around with removing %.o. Doing so stopped the TEST_PROGS objects from compiling

Removing %: but keeping %.o gave out several warnings and nothing compiled.

I'm hoping someone could shed some light into the syntax of makefile here. A quick Google search revealed that %: is related to secondary expansion. But in this code that I'm looking at,the special target .SECONDEXPANSION isn't defined.

Please help, this code makes my brains hurt ...

Upvotes: 2

Views: 5545

Answers (2)

graysonian
graysonian

Reputation: 21

This is a static pattern.

This is what it means:

Your target is any of the files described by $(TEST_PROGS) or test/verify_test

What you need to build your target is the second part: %.o libtraceback.a

The string that will replace the % symbol is exactly the name of the file that you are trying to build.

So, for example, executing make test/verify_test will set % to be "test/verify_test" and it will require test/verify_test.o and libtraceback.a

Upvotes: 1

Oliver Charlesworth
Oliver Charlesworth

Reputation: 272657

The canoncial place to look is the Make manual.

Anyway, this an example of a static pattern rule. It uses wildcards to specify a relationship between each target and a similarly-named prerequisite.

Upvotes: 4

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