CODEWITHSUNDEEP
linuxgccarmbuildrootuclibc
HardRock
HardRock

Reputation: 91

How to disable SVC ARM instruction (gcc, uclibc, buildroot)?

I'm using buildroot. Compilation works fine, but binaries on target system says "Illegal instruction"

I have used strace:

execve("/opt/busybox", ["/opt/busybox"], [/* 8 vars */]) = 0 brk(0)
= 0 --- SIGILL {si_signo=SIGILL, si_code=ILL_ILLTRP, si_addr=0xa3f20} --- +++ killed by SIGILL +++ Illegal instruction

and then IDA.

The reason is SVC instruction (si_addr pointed to it in all binaries i tried)

What should i do to prevent using this instruction by GCC ?

Upvotes: 0

Views: 841

Answers (1)

HardRock
HardRock

Reputation: 91

Looks like i have solved this problem.

The reason is EABI / OABI misconfiguration. Thanks to artless noise! I need OABI configuration.

Also, i really dont know why, but it start work only on GCC 4.3.x On default buildroot configuration of gcc 4.7.x eabi/oabi has no effect.

Finnaly, i set additional GCC options:

--with-march=armv5te --with-cpu=arm926ej-s --with-mtune=arm926ej-s --enable-multilib --disable-libssp --enable-languages=c,c++

Upvotes: 1

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