Reputation: 17486
I've got this directory structure:
.\src
contains all the source code (.h
and .cpp
).\bin
should have all the .o
and .bin
.
has Makefile
This is my current Makefile:
CFLAGS = -Wall -pedantic -g
CC = g++
EXEC = flrfile
SRC_DIR = src
BIN_DIR = bin
SOURCES := $(wildcard $(SRC_DIR)/*.cpp)
OBJ := $(patsubst $(SRC_DIR)/%,%,$(SOURCES))
OBJ := $(patsubst %.cpp,%.o,$(OBJ))
OBJ := $(addprefix ../$(BIN_DIR)/,$(OBJ))
all: flrfile
../$(BIN_DIR)/%.o: $(SRC_DIR)/%.cpp $(SRC_DIR)/%.h
$(CC) $(CFLAGS) -c $(SRC_DIR)/%.cpp -o $@
$(EXEC): $(OBJ)
@mkdir -p $(BIN_DIR)
$(CC) $(CFLAGS) $(BIN_DIR)/$(OBJ) -o $(BIN_DIR)/$(EXEC)
.PHONY : clean
clean:
-rm -rf $(BIN_DIR)
When I run make
I get this error:
g++ -Wall -pedantic -g -c src/%.cpp -o ../bin/FixedLengthFieldsRecord.o
g++: error: src/%.cpp: No such file or directory
g++: fatal error: no input files
compilation terminated.
make: *** [../bin/FixedLengthFieldsRecord.o] Error 4
Why is this? I have little to no understanding of Makefile to be honest...
Upvotes: 0
Views: 7712
Reputation: 6707
The correct line for compiling should look like this:
$(BIN_DIR)/%.o: $(SRC_DIR)/%.cpp $(SRC_DIR)/%.h
$(CXX) -o $@ -c $< $(CFLAGS)
Which means: "for every file matching the pattern "%.o" in $(BIN_DIR), compile it using the associated $(SRC_DIR)/%.cpp as argument (first dependency)
Additional comment: I suspect some missing dependencies: usually, a .c or cpp source file doesn't only depend on the corresponding header file, but might also include other headers from the project.
Upvotes: 2