CODEWITHSUNDEEP
cmakefile
PanzerKadaver
PanzerKadaver

Reputation: 363

Read a variable from Makefile, in a Makefile

The tree of my work folder:

.
|-- work_folder1
|    |-- some.c file
|    |-- Makefile B
|
|-- some.c file
|-- Makefile A

My makefile A call 'all' rule in Makefile B. The 'all' rule of Makefile B makes one .o file named 'B.o' [$(NAME) variable] and copy it on work folder (cp ../). The Makefile A compile .c file and link them with the 'B.o'. But if i decide to change the name of 'B.o' in Makefile B, for example 'my_B.o', Makefile A cannot compile cause 'B.o' dosen't exist anymore.

How can I, from Makefile A, read the $(NAME) variable of Makefile B?

Upvotes: 4

Views: 599

Answers (2)

PanzerKadaver
PanzerKadaver

Reputation: 363

I found it ! Many thanks to Didier !

In my Makefile B:

$(NAME): my_B.o

PHONY: get_name

get_name:
    @echo $(NAME)

In my Makefile A:

B_Files:=$(shell make -s -C work_folder_B get_name)

Upvotes: 0

Didier Trosset
Didier Trosset

Reputation: 37477

You can add a special .PHONY rule in your Makefile B so that it outputs the name you want.

In Makefile B

.PHONY: get_names

get_names:
    @echo "B.o"

In Makefile A

B_Files:=$(shell $(MAKE) -C work_folder_B get_names)

# You can use $(B_Files) that will contain `B.o`.

Note the use of := in Makefile A so that you run make to get the names only once.

Upvotes: 4

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