Reputation: 17466
I've got a src
folder which, after running make
, creates 4 libraries in .a
format.
There's also a folder tests
which contains tests.cpp
. This file depends on the libraries previously mentioned.
I'm trying to get a Makefile inside tests
that generates the libraries inside src
(this it does) and then uses these to compile tests.cpp
(this it doesn't - I get many many undefined references, as if it weren't linking properly).
The folder tests
contains this Makefile
:
include ../src/makefile.inc
DIR = ../src
OBJLIBS = ../src/CapaFisica.a ../src/CapaLogica.a ../src/CapaInterfaz.a ../src/Utilitarios.a
TARGETS = tests.cpp
EXE = tests
all : $(EXE)
%.a :
-for d in $(DIR); do (cd $$d; $(MAKE)); done
tests: $(OBJLIBS)
$(CC) $(CFLAGS) $(OBJLIBS) -o $@ $(TARGETS)
clean :
$(ECHO) Borrando archivos.
-$(RM) -f ./tests
cd $(DIR); make clean
find . -name "*.o" -type f -print | xargs /bin/rm -f
What am I doing wrong?
Upvotes: 0
Views: 3045
Reputation: 532
gcc linker is sensitive about the order of .o files and static libraries specified on the command line.
Replacing
$(CC) $(CFLAGS) $(OBJLIBS) -o $@ $(TARGETS)
with
$(CC) $(CFLAGS) -o $@ $(TARGETS) $(OBJLIBS)
might help. Also make sure that .a files in $(OBJLIBS)
are in the correct order if they depend on each other. Depending library must be on the command line before the library which defines the symbols.
For more details see this question: Why does the order in which libraries are linked sometimes cause errors in GCC?
Upvotes: 2