CODEWITHSUNDEEP
loopsmakefileenvironment-variables
iLya
iLya

Reputation: 81

How to convert list of filenames to set of variables names in makefile

How to convert list of filenames to set of variables names in makefile?

For example, I have list of filenames and set of variables:

    filename := file1 file2 file3 ...
    file1 := opt1
    file2 := opt2
    file3 := opt3
    ...
    ...

and now I want to create new set of variable:

    file1_opt := $(file1)
    file2_opt := $(file2)
    file3_opt := $(file3)
    ...
    ...

How to do it in Makefile?

For bash this is simple:

    for name in $(filenames)
    do
      $($(subst .,_,$(subst /,_,name)))_opt := $($(subst .,_,$(subst /,_,name)))
    done

But how to make it in makefile?

Example:

./module/files.mk

    C_SRC := a_file.c b_file.c
    CPP_SRC := c_file.cpp d_file.cpp

    a_file_c := -O2
    b_file_c := -DN_DEBUG

./Makefile

    ....

    SRCDIR := module
    include makef.mk
    ....
    $(C_OBJ) : $(OBJDIR)/%.o : %.c
      $(CC) -c $(C_FLAGS) $(C_FLAGS_$(subst .,_,$(subst /,_,$<))) $< -o $@
    ....

./makef.mk

    SAVE_C_SRC := $(C_SRC)
    SAVE_CPP_SRC := $(CPP_SRC)

    C_SRC :=
    CPP_SRC :=

    include $(SRCDIR)/files.mk
    MK_DIRS += $(OBJDIR)/$(SRCDIR)

    ----[ problem site ]----
    # this work for bash but not for make
    for name in $(C_SRC)
    do
      C_FLAGS_$(SRCDIR)_$($(subst .,_,$(subst /,_,name))) := $($(subst .,_,$(subst /,_,name)))
      $($(subst .,_,$(subst /,_,name))) :=
    done
    ----[ end of problem site ]----


    SAVE_C_SRC += $(C_SRC:%=$(SRCDIR)/%)
    SAVE_CPP_SRC += $(CPP_SRC:%=$(SRCDIR)/%)

    C_SRC := $(SAVE_C_SRC)
    CPP_SRC := $(SAVE_CPP_SRC)

Ilya

Upvotes: 1

Views: 733

Answers (2)

iLya
iLya

Reputation: 81

I was confused by words "concatenated [---] to make result of foreach" in this (http://www.gnu.org/software/make/manual/html_node/Foreach-Function.html): "The result is that text is expanded as many times as there are whitespace-separated words in list. The multiple expansions of text are concatenated, with spaces between them, to make the result of foreach." (I was thought that result of 'foreach' is one string always.)

But this:

    clear_name = $(subst .,_,$(subst /,_,$(1)))

    define rename_var
    $(2)_$(call clear_name,$(SRCDIR))_$(call clear_name,$(1)) := $($(call clear_name,$(1)))
    $(call clear_name,$(1)) :=
    endef

    $(foreach name,$(C_SRC),$(eval $(call rename_var,$(name),C_FLAGS)))

is work and make one variable for each file in C_SRC.

Ilya

Upvotes: 1

MadScientist
MadScientist

Reputation: 100856

Assuming you're using GNU make, you can use:

$(foreach name,$(subst .,_,$(subst /,_,$(C_SRC))),$(eval $(name)_opt := $($(name))))

which I believe will do what you want.

Upvotes: 1

Related Questions