Reputation: 472
In general my makefile works. Since people will ask, here it is for reference:
HEADERS = *.h
OBJS = *.o
MYFORWARDS = *.c
WARNS = -Wall
CC = gcc
CFLAGS = -mwindows -Wall
LDFLAGS = -mwindows -lkernel32 -luser32
all : my.exe
my.exe : ${OBJS}
${CC} -o "$@" ${OBJS} ${LDFLAGS}
%.o : %.c ${HEADERS}
${CC} ${CFLAGS} -c $< -o $@
I like the *.o
and *.c
so i dont have to edit the makefile each time a .c is added.
Make generally works backwards: For each target look if one of its sources changed, if so rebuild.
I dont want to change that since it's the whole point of make, however there's an exception.
The problem is, that when i create a new .c file then there exists no .o file yet and thus (make working backwards from the .o's) it does not even realize that there is a new .c.
What i have done up to now is each time i create a new .c i manually create the new .o file.
Is there a better way? Thanks in advance.
Upvotes: 3
Views: 60
Reputation: 58352
A common approach is to list out your object files, instead of relying on wildcards.
OBJS = main.o util.o something_else.o
In GNU Make, you can also use functions, as described in the manual, to make a list of .o
based on .c
:
OBJS := $(patsubst %.c,%.o,$(wildcard *.c))
Upvotes: 3