Reputation: 6651
I have a makefile that doesn't do much yet:
SRCS = *FOR
OBJS = $(SRCS:.FOR=.o)
tell_srcs: $(SRCS)
echo $(SRCS)
tell_objs: $(OBJS)
echo $(OBJS)
make tell_srcs
operates as I hoped, returning
file1.FOR file2.FOR file3.FOR ....
However, make tell_objs
returns the exact same thing:
file1.FOR file2.FOR file3.FOR ....
which is not what I expected nor need.
I guess the point is that make is not really storing the results of *FOR
in $(SRCS), but is storing the actual *FOR
"command" in $(SRCS), and the substitution I tried to do to get $(OBJS) has no effect ... I guess. Anyway, is there a way to get make to store the actual output of *FOR
in $(SRCS) so it will function as a regular macro? Thanks.
BTW, here's version info:
>make -v
GNU Make 3.81
Upvotes: 1
Views: 93
Reputation: 5155
Try this:
SRCS = $(shell echo *FOR)
OBJS = $(SRCS:.FOR=.o)
tell_srcs: $(SRCS)
echo $(SRCS)
tell_objs: $(OBJS)
echo $(OBJS)
The SRCS = *.FOR
sets SRCS to *.FOR
, not the shell-expanded result of *.FOR. So, when OBJS is processed it tries to change .FOR
at the end of *FOR
. I suspect you tried *.FOR
in SRCS and ran into the problem that the use of OBJS gave *.o
or the list of all .o
files in the directory.
make -p
can help in these cases, although I suspect this case would still have been a mystery.
Upvotes: 2