Reputation: 1252
The following x86 instruction is causing a triple fault exception (cpu reset). Any idea why?
0042F94B F20F100520E44300 movsd xmm0,qword [dword 0x43e420]
The following code was inserted just prior to that instruction to verify that memory at 0x43e420 is accessible (it is):
0042F945 8B0520E44300 mov eax,[dword 0x43e420]
X86 is in protected mode. GDT is setup properly, the segment registers are all 0x10 except cs which is 0x8. Both GDT entries are flat and use up the entire 32-bit memory space. Alignment Check (AC) on eflags is not set.
Memory at 0x43e420 is:
0x43e420: 00 00 00 00 00 00 00 40
Bochs emulator outputs these messages once that instruction is executed:
interrupt(): gate.type(9) != {5,6,7,14,15}
interrupt(): gate descriptor is not valid sys seg (vector=0x0d)
interrupt(): gate descriptor is not valid sys seg (vector=0x08)
This is part of OS boot code; not an application under any operating system.
Upvotes: 2
Views: 1267
Reputation: 14057
Given the provided information, I suspect that the SSE instructions have not been enabled for your processor. If not enabled, their use will trigger an exception (vector 19 I think). Furthermore, if this vector is not properly initialized, then I can definitely see it leading to a triple fault.
For more information on enabling the processor SSE instructions, please refer to Volume 3, chapter 13 of the 64-ia-32-architectures software development manual.
Hope this helps.
Upvotes: 7
Reputation: 106167
Given that the address is aligned and you’re in boot code, the most likely explanation for the initial exception is that SSE has not been enabled yet at that point in boot. Why that exception leads to a triple fault is a more subtle question, but probably you haven’t set up the vector to handle it.
Upvotes: 2