CODEWITHSUNDEEP
llvmllvm-ir
cpt. jazz
cpt. jazz

Reputation: 1356

Benefit of LLVM's SelectInst

LLVM has a SelectInst that is used to represent expressions like something = cond ? true-part : false-part.

What is the benefit of this instruction in the IR, as ?: could also always be lowered to a BranchInst by the compiler? Are there CPUs that support such instructions? Or is select lowered to jumps by the CodeGenerator anyway?

I reckon there may be benefits for analysis passes as the select guarantees two "branches" of the implicit if. But on the other hand, compilers are not required to use the instruction at all, so these passes must be able to deal with brs anyway.

Upvotes: 4

Views: 1336

Answers (1)

Oak
Oak

Reputation: 26868

Yes, you can use always use a conditional branch instead of a select instruction, but a select has several advantages:

  1. There are indeed relevant CPU instructions to lower those into, the most obvious example in x86 being cmov and the various setcc instructions.
  2. A select is a lot easier to vectorize - in fact, one of the usual phases of vectorization is "if conversion", the process of converting control flow (a conditional branch) to data flow (a select).

Upvotes: 7

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