CODEWITHSUNDEEP
assemblyarmmmu
temp
temp

Reputation: 195

ARM MMU disabled 4KB

I want the MMU disabled during a boot program (bare metal) for an ARMv7 architecture. Reading the ARM ARM I stumbled onto this.

"When the MMU is disabled, an instruction can be fetched if one of the following conditions is met:

• The instruction is in the same 4KB block of memory (aligned to 4KB) as an instruction that is required by a simple sequential execution of the program, or is in the 4KB block of memory immediately following such a block.

• The instruction is in the same 4KB block of memory (aligned to 4KB) from which an instruction has previously been required by a simple sequential execution of the program with the MMU disabled, or is in the 4KB block immediately following such a block."

Anyone up to decrypting and explain to me how I can ensure that instructions are within 4KB/8KB next to each other? (That is how I understand the statements..)

Upvotes: 1

Views: 571

Answers (2)

old_timer
old_timer

Reputation: 71536

If you add the rest of the context then you see that

These accesses can be caused by speculative instruction fetches, regardless of whether the prefetched instruction is committed for execution.

Note To ensure architectural compliance, software must ensure that both of the following apply:

instructions that will be executed when an MMU is disabled are located in 4KB blocks of the address space that contain only memory that is tolerant to speculative accesses

each 4KB block of the address space that immediately follows a 4KB block that holds instructions that will be executed when an MMU is disabled also contains only memory which is tolerant to speculative accesses.

All they are saying is where the branch predictors are likely to pull instructions, whether used or not. So if you have the MMU off and you are executing near the end of your ram, and your memory controller will not tolerate reads (fetches) past the end of that ram. then you may have problems. Either dont run your code that close or change your memory controller to be more tolerant, or turn the mmu on and tolerate its nuances, whatever they may be. (with the mmu on you could more easily map that next block to some other ram knowing that you wont actually be executing there, but just as a pad for the branch predictor fetches).

How do you insure this? simple tell your linker not to put code there and it will warn and/or fail if .text gets too close.

Upvotes: 1

mirabilos
mirabilos

Reputation: 5327

I think this means that you may not jump more than (8 KiB minus current page offset) forward, and not backwards into a previous 4 KiB page. Basically: linear program flow is okay, as are forward jumps by about 4 KiB; backward jumps (and loops) are only okay if they are guaranteed to not cross a page.

You can probably teach your C compiler to use a short-jumps model, if you use C; if you use assembly directly this is fairly easy to do. Also use a linker script or directly convert to a binary output format to ensure that the memory addresses you get loaded at match those you think you are loaded at during development.

Many assemblers support doing offset calculations for jumps. You could also generate a link map of all symbols, then analyse that your jumps are not too large.

Of course, looking at how the BSDs and Linux do this might prove to be useful. I guess they just enable the MMU quickly and use few and hand-written code until then.

Upvotes: 1

Related Questions