CODEWITHSUNDEEP
assemblyx86multiprocessing
Number47
Number47

Reputation: 493

Unordered read-write safety without locks

x86 32/64bit architecture

If there is a piece of data under some aligned address and we perform reading and writing on it simultaneously -- from two distinct CPUs -- but we don't care about the order of those. Is it safe to do it without locks and fences?

Specifically, would doing the following instructions simultaneously not case appearance of something like 111...000 in EAX?

MOV DWORD PTR [addr], 0xffffffff

MOV DWORD PTR [addr], 0

MOV EAX, DWORD PTR [addr]

where addr == 4n.

If not, what about unaligned addr?

Also what about switching to 64bits?

Upvotes: 0

Views: 89

Answers (1)

Kerrek SB
Kerrek SB

Reputation: 477248

From the Intel manual, Volume 3, 8.1.1 ("Guaranteed atomic operations"):

The Intel486 processor (and newer processors since) guarantees that the following basic memory operations will always be carried out atomically:

  • Reading or writing a byte
  • Reading or writing a word aligned on a 16-bit boundary
  • Reading or writing a doubleword aligned on a 32-bit boundary

The Pentium processor (and newer processors since) guarantees that the following additional memory operations will always be carried out atomically:

  • Reading or writing a quadword aligned on a 64-bit boundary
  • 16-bit accesses to uncached memory locations that fit within a 32-bit data bus

The P6 family processors (and newer processors since) guarantee that the following additional memory operation will always be carried out atomically:

  • Unaligned 16-, 32-, and 64-bit accesses to cached memory that fit within a cache line

Upvotes: 2

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