CODEWITHSUNDEEP
makefile
yangl
yangl

Reputation: 337

Could anyone explain me this makefile?

this is the makefile :

TOP=../..                 
DIRNAME=base_class/string           

H = regexp.h regmagic.h string_version.h          
CSRCS = regerror.c regsub.c EST_strcasecmp.c
TSRCS = 
CPPSRCS = EST_String.cc EST_Regex.cc EST_Chunk.cc regexp.cc

LOCAL_DEFAULT_LIBRARY = eststring

SRCS = $(CPPSRCS) $(CSRCS)
OBJS = $(CPPSRCS:.cc=.o) $(CSRCS:.c=.o)

FILES = $(SRCS) $(TSRCS) $(H) Makefile
LOCAL_INCLUDES=-I.

ALL = .buildlibs

include $(TOP)/config/common_make_rules

now i know these part is variable

TOP=../..                 
DIRNAME=base_class/string           

H = regexp.h regmagic.h string_version.h          
CSRCS = regerror.c regsub.c EST_strcasecmp.c
TSRCS = 
CPPSRCS = EST_String.cc EST_Regex.cc EST_Chunk.cc regexp.cc

LOCAL_DEFAULT_LIBRARY = eststring

SRCS = $(CPPSRCS) $(CSRCS)

what i do not know is :

OBJS = $(CPPSRCS:.cc=.o) $(CSRCS:.c=.o)

pls tell me the meaning of above statement , it is best if you figure out what above statement omit. thanks.

Upvotes: 0

Views: 849

Answers (1)

MadScientist
MadScientist

Reputation: 100781

You can look this up in the GNU make manual. The above is equivalent to writing $(CPPSRCS:%.cc=%.o) (and ditto for CSRCS). In both of these, it goes through each word in the variable and if it matches the left-hand side of the equality, it's replaced with the right-hand side. So if a word matches the pattern %.cc (where % to make matches any sequence of characters), then it's replaced with %.o (where % is the same as in the original). The form you see is a special case where you can omit the % if it's the first thing in both sides.

So, given CPPSRCS = EST_String.cc EST_Regex.cc EST_Chunk.cc regexp.cc, then $(CPPSRCS:.cc=.o) expands to EST_String.o EST_Regex.o EST_Chunk.o regexp.o.

Upvotes: 1

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