Reputation: 3812
I don't understand this sample from here :
" Assuming 'x' and 'y' are initially 0:
-Thread 1-
y.store (20, memory_order_release);
-Thread 2-
x.store (10, memory_order_release);
-Thread 3-
assert (y.load (memory_order_acquire) == 20 && x.load (memory_order_acquire) == 0)
-Thread 4-
assert (y.load (memory_order_acquire) == 0 && x.load (memory_order_acquire) == 10)
Both of these asserts can pass since there is no ordering imposed between the stores in thread 1 and thread 2.
If this example were written using the sequentially consistent model, then one of the stores must happen-before the other (although the order isn't determined until run-time), the values are synchronized between threads, and if one assert passes, the other assert must therefore fail. "
Why in acquire/release
two assert can pass?
Upvotes: 1
Views: 566
Reputation: 476940
When your memory model is not sequentially consistent, then different threads can see a different state of the world, and in such a way that there is no single, global state (or sequence of states) that is consistent with what both thread see.
In the example, thread 3 could see the world as follows:
x = 0
y = 0
y = 20 // x still 0
And thread 4 could see the world as follows:
x = 0
y = 0
x = 10 // y still 0
There is no global sequence of state changes of the world that is compatible with both those views at once, but that's exactly what's allowed if the memory model is not sequentially consistent.
(In fact, the example doesn't contain anything that demonstrates the affirmative ordering guarantees provided by release/acquire. So there's a lot more to this than what is captured here, but it's a good, simple demonstration of the complexities of relaxed memory orders.)
Upvotes: 1