CODEWITHSUNDEEP
makefilewildcard
Tails86
Tails86

Reputation: 557

GNU Make: Multiple PHONY Targets with Wildcard-like Functionality? (Passing different pre-processor directives to compiler)

The title here may be a little confusing because I had a hard time trying to word this in a single sentence. I understand that wildcards cannot be used with phony targets. This question is asking if there is any kind of workaround to accomplish passing different pre-processor directives to the compiler through make's PHONY targets.

For example, I have software that will compile differently if MODEL_A, MODEL_B, or MODEL_C is defined. Therefore, if I pass -DMODEL_A to the compiler, it will compile differently than if I passed -DMODEL_B. In my makefile, I have the following:

AVAILABLE_MODELS=MODEL_A MODEL_B MODEL_C
SELECTED_MODEL=
...
.PHONY: $(AVAILABLE_MODELS)
MODEL_A: SELECTED_MODEL=MODEL_A
MODEL_B: SELECTED_MODEL=MODEL_B
MODEL_C: SELECTED_MODEL=MODEL_C
$(AVAILABLE_MODELS): Build_Image
...
#Build image for selected model (pass "-D$(SELECTED_MODEL)" to compiler)
Build_Image:
...

It would be most ideal if I could just add any new model to the AVAILABLE_MODELS variable once new models are added. In the above design though, I need to also make sure that I define the target as well with the appropriate selected model name. It would be nice if I could do the following.

MODEL_%: SELECTED_MODEL=MODEL_%

Of course, that is ignored as a phony target candidate since it uses a wildcard. Is there any 'trick' that I am missing for this one? Is there any way to optimize the above?

Upvotes: 2

Views: 429

Answers (1)

MadScientist
MadScientist

Reputation: 100866

You can do it with eval:

$(foreach M,$(AVAILABLE_MODELS),$(eval $M: SELECTED_MODEL=$M))

should work.

Upvotes: 1

Related Questions