Why does this incredibly simple Makefile produce so much debug logging?

Question

I am learning about Makefiles and decided to write my first exercise. I have a directory with two files:

Makefile  makefile.cpp  

Here is makefile.cpp (surprise surprise!):

#include <iostream>

int main() {
  std::cout << "Hello World!\n";
  return 0;
}

And here is Makefile:

CC = g++
FILES = makefile.cpp
OUT_EXE = makefileout

build: $(FILES)
    $(CC) -o $(OUT_EXE) $(FILES)

And then I run make -d and get a very long log:

$ make -d
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for x86_64-pc-linux-gnu
Reading makefiles...
Reading makefile `Makefile'...
Updating makefiles....
 Considering target file `Makefile'.
  Looking for an implicit rule for `Makefile'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.o'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.c'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.cc'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.C'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.cpp'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.p'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.f'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.F'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.r'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.s'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.S'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.mod'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.sh'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile,v'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `RCS/Makefile,v'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `RCS/Makefile'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `s.Makefile'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `SCCS/s.Makefile'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.o'.
  Looking for a rule with intermediate file `Makefile.o'.
   Avoiding implicit rule recursion.
   Trying pattern rule with stem `Makefile'.
   Trying implicit prerequisite `Makefile.c'.
   Trying pattern rule with stem `Makefile'.
   Trying implicit prerequisite `Makefile.cc'.
   Trying pattern rule with stem `Makefile'.
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   Rejecting impossible implicit prerequisite `Makefile.F'.
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   Looking for a rule with intermediate file `Makefile.s'.
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  Rejecting impossible implicit prerequisite `Makefile.C'.
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  Rejecting impossible implicit prerequisite `Makefile.cpp'.
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  Rejecting impossible implicit prerequisite `Makefile.p'.
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  Rejecting impossible implicit prerequisite `Makefile.f'.
  Trying pattern rule with stem `Makefile'.
  Rejecting impossible implicit prerequisite `Makefile.F'.
  Trying pattern rule with stem `Makefile'.
  Rejecting impossible implicit prerequisite `Makefile.r'.
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  Rejecting impossible implicit prerequisite `Makefile.s'.
  Trying pattern rule with stem `Makefile'.
  Rejecting impossible implicit prerequisite `Makefile.S'.
  Trying pattern rule with stem `Makefile'.
  Rejecting impossible implicit prerequisite `Makefile.mod'.
  Trying pattern rule with stem `Makefile'.
  Trying implicit prerequisite `Makefile.sh'.
  Looking for a rule with intermediate file `Makefile.sh'.
   Avoiding implicit rule recursion.
   Trying pattern rule with stem `Makefile.sh'.
   Trying implicit prerequisite `Makefile.sh,v'.
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   Trying implicit prerequisite `s.Makefile.sh'.
   Trying pattern rule with stem `Makefile.sh'.
   Trying implicit prerequisite `SCCS/s.Makefile.sh'.
  No implicit rule found for `Makefile'.
  Finished prerequisites of target file `Makefile'.
 No need to remake target `Makefile'.
Updating goal targets....
Considering target file `build'.
 File `build' does not exist.
  Considering target file `makefile.cpp'.
   Looking for an implicit rule for `makefile.cpp'.
   Trying pattern rule with stem `makefile.cpp'.
   Trying implicit prerequisite `makefile.cpp,v'.
   Trying pattern rule with stem `makefile.cpp'.
   Trying implicit prerequisite `RCS/makefile.cpp,v'.
   Trying pattern rule with stem `makefile.cpp'.
   Trying implicit prerequisite `RCS/makefile.cpp'.
   Trying pattern rule with stem `makefile.cpp'.
   Trying implicit prerequisite `s.makefile.cpp'.
   Trying pattern rule with stem `makefile.cpp'.
   Trying implicit prerequisite `SCCS/s.makefile.cpp'.
   No implicit rule found for `makefile.cpp'.
   Finished prerequisites of target file `makefile.cpp'.
  No need to remake target `makefile.cpp'.
 Finished prerequisites of target file `build'.
Must remake target `build'.
g++ -o makefileout makefile.cpp
Putting child 0x01a6de60 (build) PID 6157 on the chain.
Live child 0x01a6de60 (build) PID 6157 
Reaping winning child 0x01a6de60 PID 6157 
Removing child 0x01a6de60 PID 6157 from chain.
Successfully remade target file `build'.

The question I have: Am I doing something wrong? Why is so much logging being produced for such a simple example?

Also, my Makefile always seems to recompile the object code even if the source code is older than the latest make. In other words, I have never seen the message, "There is nothing to do."

Answer 1

By default, make has a lot of predefined rules regarding the building of application by compilation. See https://www.gnu.org/software/make/manual/make.html#Implicit-Rules

You can drastically reduce the amount of effort make goes through by adding .SUFFIXES: to your makefile. As a consequence, this could cripple your make as a lot of rules are now no longer going to be present.

I've found that even if I use .SUFFIXES:, I'll still get implicit rules due to the Makefile sitting in a git checkout. My project is NOT related to compiling applications.

Another way to reduce the amount of effort is to disable the suffixes from the command line. Using the -r or --no-builtin-rules flag causes the default list of suffixes to be empty.

Answer 2

I'll address the edit:

my Makefile always seems to recompile the object code even if the source code is older than the latest make

in this answer.

Consider your Makefile:

CC = g++
FILES = makefile.cpp
OUT_EXE = makefileout

build: $(FILES)
    $(CC) -o $(OUT_EXE) $(FILES)

Here the only target is build, which is something that is NEVER constructed (and that's why you see the compilation occurring every time). The simplest fix to this should be:

CC = g++
FILES = makefile.cpp
OUT_EXE = makefileout

${OUT_EXE}: $(FILES)
    $(CC) -o $(OUT_EXE) $(FILES)

With the new rule make will check for makefileout and not build, thus providing the expected behavior.

If you want to experiment a little more you may use your Makefile issuing the following commands:

rm -f makefileout
touch build
make

You'll se that even if the executable is not present, make won't compile it. I leave to you the question why as (a simple) exercise.

Answer 3

Because you are passing "-d" to "make". The "-d" parameter is what's generating all the noise.

-d   Print debugging information in addition to normal processing.  The
     debugging information says which files are  being  considered  for
     remaking,  which  file-times  are  being  compared  and  with what
     results, which files actually need to be  remade,  which  implicit
     rules  are considered and which are applied---everything interest‐
     ing about how make decides what to do.

So stop passing -d to make and you'll get the output you likely expect.

Answer 4

passing the -d flag to make has the effect of printing additional information which is sometimes helpful in debugging problems.

Answer 5

Well, you have asked for debug with -d option. You got it. If you ask why GNU make has so much implicit rules which are checked everytime make processes a Makefile - that's mainly for historical reasons. There're build systems (e.g. Ninja) which don't have such a long development history and thus have less stuff within.