CODEWITHSUNDEEP
linuxgccx86sse
David Monniaux
David Monniaux

Reputation: 2004

Stack alignment on x86

I had a mysterious bus error that occurred, on a x86 (32-bit) platform, when running code compiled with gcc-4.8.1 with -march=pentium4. I traced the problem to an SSE instruction:

movdqa %xmm5,0x50(%esp)

with esp = 0xbfffedac. movdqa requires the address to be 16-byte aligned, which is not the case here, thus the bus error.

The problem does not occur if compiling with -march=native (this is a Core-i3 processor).

As far as I know, the only stack alignment guaranteed on Linux/x86 is 4-byte. Thus, it seems weird that the code generator should choose to use movdqa, without some kind of alignment check, even though there is an instruction movdqu for possibly unaligned accesses.

So, this looks like there is a bug in gcc.

I'm not an expert on SSE and x86 ABI, and I'd appreciate feedback before I send a bug report.

Upvotes: 10

Views: 3992

Answers (1)

David Monniaux
David Monniaux

Reputation: 2004

Now the default in gcc is -mpreferred-stack-boundary=4 (16-byte alignment), which sets -mincoming-stack-boundary=4.

Problems can thus occur if gcc code using SSE is called from code generated by other compilers which have different stack alignment assumptions, such as OCaml (see discussion on the OCaml bug tracker).

Upvotes: 7

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