CODEWITHSUNDEEP
linuxmakefilegnu-make
dkn37
dkn37

Reputation: 13

How to pass target stem to a shell command in Makefile

I'm writing a static pattern rule to generate a list of dependencies for targets matching a pattern. The dependencies are generated through a shell command (the file content gives information about the dependencies). Here's an example of the explicit rule:

f1.o: $(shell gendep src/f1/f1.source)
    ... (some compilation command here) ...

While this works, I do not want to rewrite it for each new target since I'm maintaining the same file structure. My attempt at static pattern rule was like so:

%.o: $(shell gendep src/%/%.source)
    ...

I'm having trouble passing the stem (matched pattern for %) to the shell command. The shell command interprets it literally and operates on src/%/%.source, which of course doesn't exist.

I suspect there is way of passing the stem to the shell command but I don't seem to find it. Any experts here might be able to help me? Sorry if this is a newbie question (I'm indeed one).

Upvotes: 1

Views: 1643

Answers (1)

Beta
Beta

Reputation: 99134

What you're trying to do is difficult, because ordinarily Make will expand the $(shell ...) directive before running any rule, or even deciding which rules must be run. We can retard that by means of Secondary Expansion, a slightly advanced Make trick:

.SECONDEXPANSION:

%.o: $$(shell gendep src/$$*/$$*.source)
    ...

There are also other methods for automatic dependency generation.

Upvotes: 3

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