Reputation: 789
Reviewing some practice exam questions for class and one of the questions ask to write the assembly statements for a task...
Set the zero bit in the flag register
solution - add R1, R0, R0 ( there are many ways of doing it )
I'm not clear on why this would apply to the zero bit in the flag register?
Upvotes: 0
Views: 855
Reputation: 18493
Real MIPS processors (normally) do not have "flags".
However some universitary MIPS variants (I found some in Google) add flags for educational purposes.
Unlike MIPS CPUs nearly all other CPU types do not have conditional jump instructions that can jump dependent on a register value (like "BLTZ"). Instead they have conditional jump instructions that jump dependent on the result of the previous arithmethic operation.
Therefore these CPUs must have a special "register" saving information about the last result (like "result was negative"). This register contains special bits - the so-called "flags". One of these bits is the "Zero Flag" that indicates that the result was zero.
Note:
Upvotes: 2
Reputation: 338
The R0
register is hardwired to be the value zero, so adding it to itself will produce a zero result. Therefore the MIPS ALU will have its zero (Z) flag set.
Reference section 2.4.8.1 of the MIPS32 Architecture For Programmers document which states:
Two of the CPU general-purpose registers have assigned functions:
r0 is hard-wired to a value of zero, and can be used as the target register for any instruction whose result is to be discarded. r0 can also be used as a source when a zero value is needed.
Upvotes: 0