Reputation: 2992
I have an issue with my makefile which says No rule to make target /obj/%.o, needed by /bin/exec. Stop.
But from what I understand I have it:
# define the C compiler to use
CC = gcc
# define any compile-time flags
# add -DDEBUG for debug mode
CFLAGS = -Wall
# define any directories containing header files
INCLUDES = -I/includes
# define src folder
SRC_FOLDER = /src
# define src files
SRC = $(wildcard $(SRC_FOLDER)/%.cpp)
# define object folder
OBJ_FOLDER = /obj
# define obj files
OBJ = $(patsubst %.cpp, %.o, $(SRC))
# define binary path
BIN_FOLFER = /bin
# define the executable file
MAIN = $(BIN_FOLFER)/exec
# compile object files
$(OBJ_FOLDER)/%.o: $(SRC_FOLDER)/%.cpp
$(CC) $(CFLAGS) $< -o $@
# build
$(MAIN): $(OBJ_FOLDER)/%.o
$(CC) $(CFLAGS) $^ -o $@
# cleaning
.PHONY: clean
clean:
rm -f $(OBJ_FOLDER)/%.o
I am sorry for any possible major errors in the makefile, this is my first makefile. What am I doing wrong?
Upvotes: 0
Views: 1516
Reputation: 76236
$(MAIN): $(OBJ_FOLDER)/%.o
requests %.o
exactly. The %
does not act as pattern here, because it does not appear on both sides of the rule. You need to use the $(OBJ)
variable there. But it first need to be fixed, because you are only replacing the extension, but you need to replace the directory too.
Finish the $(OBJ)
variable (as Lutin already said) (ok, but I modified it a bit; I presume you only want the direct descendants of the directory):
SRC = $(wildcard $(SRC_FOLDER)/*.cpp)
OBJ = $(patsubst $(SRC_FOLDER)/%.cpp, $(OBJ_FOLDER)/%.o, $(SRC))
Fix the rule to actually use the $(OBJ)
variable:
$(MAIN): $(OBJ)
Oh, and you most probably don't want SRC_FOLDER
, OBJ_FOLDER
and BIN_FOLDER
to start with /
as that puts them in the filesystem root it's not where your project lives. And with the patterns above they should not end with slash either.
Upvotes: 4
Reputation: 3
It works with that:
SRC = $(wildcard $(SRC_FOLDER)*/*.cpp $(SRC_FOLDER)*.cpp)
OBJ = $(patsubst $(SRC_FOLDER)%.cpp, $(OBJ_FOLDER)%.o, $(SRC))
Upvotes: 0