CODEWITHSUNDEEP
kernelarm
Rahul
Rahul

Reputation: 1627

Why in case of ARM instruction set, PC is set to current_address + 8?

I understnad that, ARM uses 3 stage pipeline. So an instruction is divided in 3 parts fetch, decode and execute.

My first doubt is, does it mean instruction is converted to 3 instructions? so will it 3 address while loading?

Second doubt is, Why we set PC as current_address + 8 ?

Upvotes: 2

Views: 252

Answers (2)

old_timer
old_timer

Reputation: 71576

Understand that it is TWO INSTRUCTIONS ahead. for the 32 bit architctures that means arm mode is 8 bytes ahead, two instructions. But in thumb mode it can be between 4 and 8 bytes, what matters is it is two instructions...

Upvotes: 0

auselen
auselen

Reputation: 28087

You are describing about early ARM architectures, where ARM cores from the start have at least three stages in pipeline. Newer ARM architecture have more stages in their pipelines however as a backward compatibility quirk PC is still +8 address ahead when executing an instruction.

For example manuals says ARM1156T2-S has 9 stages, ARM946E-S has 5, etc.

Core pipeline stages goes like; fetch, decode and execute. Fetch loads the instruction from a memory, so if you think like you are currently executing instruction at n, decode stage is at n + 4, and next fetch is at n + 8. It goes with the multiplies of 4 since an instruction in ARM is 4 bytes in ARM mode. (It could have been +4 if you were in thumb/thumb2 modes)

Upvotes: 4

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