Reputation: 417
I am trying to link all object I have build in my makefile during the executable compilation, but I cant seem to automate selecting the build directory.
I have tried:
test: $(OBJECTS)
$(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) $(BUILDDIR)/$^ test.cpp -o test.exe
The problem is that $(BUILDDIR)/$^
only inserts $(BUILDDIR)
in front of the first object file.
How should I be doing this?
Upvotes: 0
Views: 90
Reputation: 977
If you want to add $(BUILDDIR)
to all the prerequisites directly in the command, then you can do:
test: $(OBJECTS)
$(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) $(addprefix $(BUILDDIR)/,$^) test.cpp -o test.exe
However, setting up make rules this way means you're not tracking dependencies correctly. I think what you actually want is this:
test: $(addprefix $(BUILDDIR)/,$(OBJECTS))
$(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) $^ test.cpp -o test.exe
Upvotes: 1