CODEWITHSUNDEEP
cmakefile
imre
imre

Reputation: 489

Using Makefile to link multiple files

I'm kind of lost in the Makefile business and I'm trying to come to terms with it. I would love if someone could make it clear on an example I'm currently programming.

I have these files:

my-bit-vector.h -> a header file included in eratost.c, ppm.c
ppm.c -> a .c file which includes my-bit-vector.h and error.h
error.h -> a header file included in eratost.c, ppm.c
error.c -> a .c file which includes error.h and defines the functions in it
erato.c -> a .c file which includes my-bit-vector.h and error.h

I need to link these together into one executable file. How would I go about doing that via Makefile? I hope I didn't forget something. Could you please help?

Upvotes: 1

Views: 2672

Answers (2)

mah
mah

Reputation: 39797

The contents of a Makefile, when put simple, is one or more targets (the things you want built). Each target has dependencies (if any dependencies don't exist yet, they must be built, and if they do exist but they're newer than their target, the target must be rebuilt), and rules (the commands to build the target, presumably from the dependencies).

In your case, lets say your final output is a program called program. You've identified the sources to build it, but you don't build an executable directly from sources, you do it from object files. You could start your makefile like this:

program: ppm.o error.o erato.o
        cc -o program ppm.o error.o erato.o

WARNING The spacing on rule lines (the cc command line shown above) requires a TAB, not just spaces!

That's enough to start but not enough to be right. You'll notice that there's no target:dependency/rules for the .o's yet, but it still works because Make has some built-in rules.

With this makefile, if you type "make" twice, the first time you'll see everything gets built and the second time it won't -- nothing changed so no rebuild is needed. Unfortunately if you edit your .h's now, the .c's still won't rebuild, so lets fix that:

program: ppm.o error.o erato.o
        cc -o program ppm.o error.o erato.o

ppm.o: ppm.c my-bit-vector.h error.h

error.o: error.c error.h

erato.o: erato.c my-bit-vector.h error.h

Now you've got your dependencies set to cause make to rebuild sources that must be rebuilt when headers change. There's no rules on those source builds because the built-in rule here is (often) sufficient. You can override the built-in if necessary, of course.

Here, when you type "make", the tool will find the first target (program) and inspect its dependencies. It will then make sure each of its dependencies are up to date (based on their target:dependency / rule definitions), recursively as long as there are targets needing to be considered for being built. Finally it will apply the rules for this target to complete its build.

There's much more that can be done with makefiles, this is just a brief intro.

Upvotes: 3

robin.koch
robin.koch

Reputation: 1223

program: ppm.o error.o erato.o
    gcc ppm.o error.o erato.o -o program
ppm.o: ppm.c
    gcc -c ppm.c -o ppm.o
error.o: error.c
    gcc -c error.c -o error.o
erato.o: erato.c
    gcc -c erato.c -o erato.o

stuff before the ":" is the target. stuff after ":" are the required targets for this target. So if you "make program" make is looking for a target named "all". The target all requires ppm.o which is also defined as target in the makefile. So it executes this target first. the target ppm.o requires ppm.c which has no target defined in the makefile, so it is probably a file. I hope this explains the basic functionality to you.

http://mrbook.org/tutorials/make/ is a really good tutorial for beginners, with some basic makefile examples.

Upvotes: 3

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