Reputation: 1075
I tried to make a generic makefile where you supply the names of the source files and some directories, but I can't get the generic rule for the object files to work.
My makefile is like this:
SOURCE_NAMES=main
EXECUTABLE_NAME=Program
EXECUTABLE_DIR=./dist
EXECUTABLE_EXT=
SOURCE_DIR=./src
SOURCE_EXT=.cc
OBJECT_DIR=./build
OBJECT_EXT=.obj
COMPILER=gcc
COMPILER_FLAGS=-c -Wall -std=gnu++11
LINKER_FLAGS=
SOURCES=$(addsuffix $(SOURCE_EXT),$(addprefix $(SOURCE_DIR)/,$(SOURCE_NAMES)))
OBJECTS=$(addsuffix $(OBJECT_EXT),$(addprefix $(OBJECT_DIR)/,$(SOURCE_NAMES)))
EXECUTABLE=$(EXECUTABLE_DIR)/$(EXECUTABLE_NAME)$(EXECUTABLE_EXT)
all: $(EXECUTABLE)
$(EXECUTABLE): $(OBJECTS)
$(COMPILER) $(LINKER_FLAGS) $(OBJECTS) -o $@
%$(OBJECT_EXT): %$(SOURCE_EXT)
$(COMPILER) $(COMPILER_FLAGS) $< -o $@
However, the final rule, %$(OBJECT_EXT): %$(SOURCE_EXT)
, does not seem to be working correctly, judging from the error I get:
make: *** Er is geen regel om doel 'build/main.obj' te maken, nodig voor 'dist/RandomGenerator'. Gestopt.
which translates to:
make: *** There is no rule to make target 'build/main.obj', required for 'dist/RandomGenerator'. Stopped.
When I write the rule explicitly, it does work:
./build/main.obj: ./src/main.cc
$(COMPILER) $(COMPILER_FLAGS) $< -o $@
But I would rather not explicitly do that for every source file.
How do I fix this?
Edit:
Just for clarity, this question is about why the generic rule at the end of my makefile isn't working. I would expect ./build/main.obj
to match %$(OBJECT_EXT)
or %.obj
, but that doesn't seem to be the case and I don't understand why it doesn't work.
Upvotes: 0
Views: 521
Reputation: 70372
Try adding ./build
and ./src
to your rule (which are contained in your "explicit" rule but absent from the variables you use in your Makefile).
Upvotes: 1