Reputation: 171
I'm currently investigating what the runtime of different programming languages looks like behind the scenes. For a compiled language like C, people usually give the explanation of "Code is compiled to assembly which is assembled and linked into a binary executable. The executable is then loaded into memory and the CPU interprets it." My question is how does the CPU know where to look for the next instruction to execute? Is it a memory address stored in one of the registers?
Upvotes: 2
Views: 2219
Reputation: 93446
The CPU does not "interpret" machine code - it executes it directly - that's why it is called machine code.
A processor typically has a register called a Program Counter (PC), this starts on reset at a location normally known as the reset vector which is either fixed for the processor, or is loaded from a fixed location, and is incremented to the next instruction after each non-branching sequential instruction is executed. Branching and direct jump instructions can cause the PC to be set to something other then the next instruction sequential address.
You can observe this behaviour by stepping through code at the assembler level in a debugger (the debugger should have the capability to watch CPU registers). Note that assembler is a human-readable (more-or-less) representation of machine code, and the debugger shows a disassembly of the actual machine code rather then the compiler generated assembler - in the debugger one assembler instruction == one machine instruction. Most assemblers support macros and directives that may not always have the same one-to-one relationship, so even for code that was originally assembler code, the disassembly may not be always identical to the source code..
The process (known as the instruction cycle or fetch/execute cycle is described in detail here.
Upvotes: 4
Reputation: 7996
The first instruction location is specified in the CPU datasheet. The machine manufacturer ensure there is some valid instruction there (usually in ROM). This first program is then executed. The CPU knows the length of instructions so it can go to the next location by itself (adding the length of current instruction to the current instruction location). An exception is for CALL and JMP instructions, which directs to another location. But these instructions contains in themselves the data needed to compute the location they branch to.
Upvotes: 0
Reputation: 2007
The program counter or instruction pointer holds the address of the next line.
There is also an instruction cache that holds opcodes (memory) that are likely to soon be executed, so direct memory access can be avoided.
On most newer processors, instructions aren't actually executed in order, but instead the processor just simulates what the result of a sequence of opcodes would be if they had been executed in order. A lot of information of how this works can be gleaned from optimization manuals. I highly recommend the manuals at http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html if you want to learn more about how this stuff is done while learning a practical skill.
Upvotes: 3