CODEWITHSUNDEEP
statecontinuousmodelicadymola
PhilMe
PhilMe

Reputation: 13

Dymola - Continuous Input for State Machine

While trying to use State Machines in Dymola (btw: I am an absolute newbie) I have problems to declare a sine curve as an input variable. I receive the following 1st error message (I paste only the beginning):

Continuous time parts and discrete parts don't decompose for:
_StateMachines.state1.activeReset
_StateMachines.state1.act...

and a 2nd one:

Decomposition in base clocks failed.
See the file dsmodelBaseClockDecomposition.mof.

I understand that the problem is caused by trying to use a continuous time variable, namely the sine function, as an input for a discrete block, namely the state machine.

How can I connect the sine function with the state machine?

EDIT:

My Code looks like this (I have deleted the annotations):

model ZLG3_v2 "2nd Version of ZLG3"

  inner Real T_2(start=283);
  Real T_ZuL(start=295);

  model State1
    outer output Real T_2;

  equation
    T_2=previous(T_2)+2;

  end State1;
  State1 state1;

  model State3
    outer output Real T_2;
  equation
    T_2=previous(T_2)-1;

  end State3;
  State3 state3;

  Modelica.Blocks.Sources.Sine sine(freqHz=0.25, offset=305);
equation
//T_ZuL = 295;
T_ZuL=sine.y;

  initialState(state1);
  transition(
    state3,
    state1,T_2 <= T_ZuL,
    immediate=false,
    reset=true,
    synchronize=false,
    priority=1);
  transition(
    state1,
    state3,T_2 > T_ZuL,
    immediate=false,
    priority=1,
    reset=true,
    synchronize=false);
end ZLG3_v2;

The two lines

//T_ZuL = 295;
T_ZuL=sine.y;

are of interest. Using the (currently not commented) equation withe sine.y the error message occurs. The other way round everything works just fine.

Thank you very much in advance and best regards.

Upvotes: 1

Views: 488

Answers (1)

Marco Romanoni
Marco Romanoni

Reputation: 471

Well the issue there is the inferred clock that you have to explicit, otherwise you are using a continous signal (sine.y) in a discrete state machine that has its own discrete clock. To sample the sin signal with the clock of the state machine, a sample block is enough:

model ZLG3_v3 "3rd Version of ZLG3"
  inner Real T_2(start=283);
  State1 state1;
  State2 state2;
  Modelica.Blocks.Logical.Greater greater;
  Modelica.Blocks.Sources.RealExpression realExpression(y=T_2);
  Modelica.Blocks.Sources.Sine sin(y(start=295),freqHz=0.25, offset=305);
  Modelica_Synchronous.RealSignals.Sampler.Sample sample;
  model State1
    outer output Real T_2;
  equation 
    T_2=previous(T_2)+2;
  end State1;
  model State2
    outer output Real T_2;
  equation 
    T_2=previous(T_2)-1;
  end State2;
equation 
  transition(
    state2,
    state1,greater.y,immediate=true,reset=true,synchronize=false,priority=1);
  transition(
    state1,
    state2,not greater.y,immediate=true,reset=true,synchronize=false,priority=1);
  connect(realExpression.y, greater.u2);
  connect(sin.y, sample.u);
  connect(sample.y, greater.u1);
end ZLG3_v3;

Edit:

I noticed that there is an issue with the state Machine itself, below a snapshot of a state machine wiht the same real input signal as trigger for the transitions, that has no error checks and that simulates: enter image description here

Upvotes: 1

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