NAND flash: Whats the difference between pagesize and eraseblocksize?

Question

So my flashmemory has a 2k pagesize and a 128k eraseblocksize. Using flash_erase /dev/mtd1 0 0 from mtd-utils I can erase the whole mtd1 partition. The partition is 256k in total. So 2 eraseblocks are erased. I can only erase entire eraseblocks. But when writing to the flash I only have to write pagealigned. Where's the difference exactly and why can't I just write 0xFF to memory that i want to delete instead of using erase that has to be pagealigned. Thanks in advance for your input!

Answer 1

In order to erase the memory the hardware knows what the erase state is and can erase a larger physical block of it and will, since that is how it is physically built.
But to write it, to change some of those 1s to zeros (In some cases, or perhaps all, there is an inverter in there. An erased bit is really a zero. But due to logic savings it is inverted at some point. So we see it as a 1.) the physical architecture only wants to do that in pages.
So I suspect there is a little bit of RAM on the part, the size of a page, you load that ram with the data you want. Then, based on the physical and logical architecture of the chip, it can modify that page based on what you wanted it to be (Or at least it zeros the bits you wanted zero, it can't make the zeros into ones).
Likewise, due do the physical properties of the memory, you can only do page writes in aligned blocks, not randomly, not unaligned.

So I suspect the reason for the erase size and program sizes (sector and page) are due to what is being written and how much storage is required to be present before the "write" happens.

Answer 2

Flash memory is organised into x-number of blocks (or sectors), themselves of which are split into y-number of pages. As you have found, Flash can only be erased a block at at time, but can be written to a page at a time and sometimes finer. This fact is due to the physical design of the memory at the microelectronic level and how bits of information in each memory cell are physically stored and released. For more information on the science, check out Wikipedia, it explains it better than I could. I suspect the decision was made to design Flash this way (block erases only) because it makes it much faster than EEPROM, which can be erased a byte at a time.

The upshot of all this for the person who actually wants to write or use a driver for a Flash memory is that bits of information can only be cleared from 1 to 0, not set. This is why you are unable to "write a 1".

The practical side-effect of this is that if you write, say 0xAA = 0b10101010 to some addressable byte within a page within a block, you cannot then overwrite this memory for bits that have already been written ("cleared"). For example, if you tried to write 0x0F = 0b00001111 to this same byte again, you will end up with 0x0A = 0b00001010. Obviously, this is not want you would want.

As a side-note, Phase Change Memory (PCM) is a new technology that is starting to gain traction, and due to its design it does allow you to do bit-alterable writes (sets and clears).