CODEWITHSUNDEEP
linux-kernelarm
user487363
user487363

Reputation: 173

arm timer interrupt (arm_arch_timer)

I am tracing some SMP timer code on Linux. I found out that some platform using the ARM arch_arm_timer which is arm core internal timer.

The device tree definition is as follows:

    timer {
            compatible = "arm,armv7-timer";
            interrupts = <1 13 0xf08>,
                         <1 14 0xf08>,
                         <1 11 0xf08>,
                         <1 10 0xf08>;
    };

I am confused. Why are its interrupt numbers 13 14 11 10? I check the GIC manual and its private timer using ID 29.

Upvotes: 1

Views: 4322

Answers (1)

unixsmurf
unixsmurf

Reputation: 6234

So, and this is a guess, I think these refer to Private Peripheral Interrupt IDs. The generic timer is wired up in the Cortex-A15 to interrupts 26, 27, 29, 30. Since the PPIs range from ID 16 to ID 31, these refer to

  • Secure Physical Timer event (ID 29 <= 16 + 13)
  • Non-secure Physical Timer event (ID 30 <= 16 + 14)
  • Virtual Timer event (ID 27 <= 16 + 11)
  • Hypervisor Timer event (ID 26 <= 16 + 10)

Upvotes: 1

Related Questions