user3679015
user3679015

Reputation: 61

Addressing mode in IA-32

I have searched for Addressing modes in IA-32,but I haven't seen any website or an article which have explained the addressing modes simply. I need an article or something which explain the matter simply by some picture of the memory during it changes and specifying the address mode by pictures.

I know that in IA-32 general form of addressing follows the following form :

Segment + Base + (index * scale) + displacement

I want to know the exact meaning of the displacement,scale,index and finally the base. As I don't know English as well I forced to search them but I didn’t find the technical mean of the words for this case ( In assembly programming language I mean ).

Finally, I want an explanation of addressing modes in IA-32 simply and preferably have been represented by pictures about The memory and its offset and ...

I learn assembly programming language by A guide to assembly programming in Linux's book.

So thanks.

Upvotes: 3

Views: 701

Answers (1)

Mika Lammi
Mika Lammi

Reputation: 1298

Found this image from this power point presentation.

Addressing modes

This means that you can have addresses like [eax + ecx * 2 + 100]. You don't necessarily have to use all of these fields.

See also Referencing the contents of a memory location. (x86 addressing modes)

The scale factor is encoded into machine code as a 2-bit shift count. ESP can't be an index because of special cases for indicating the presence of a SIB byte and for a SIB byte with no index. See rbp not allowed as SIB base? for a rundown on the special cases.


Segmentation can be ignored in 32/64-bit mode under normal OSes like Linux.

The segment register is selected automatically depending on the base register in the addressing mode, or with segment override prefix (e.g. ds:, cs:).

But Linux uses a flat memory model so the segment base is always 0 for all segments (other than fs or gs, used for thread-local storage). The segment base is added to the "offset" calculated from base, index, scale and displacement to get the final linear address. So normally the "offset" part is the whole linear address.

That linear address is a virtual address, which the hardware translates to physical via the page tables / TLB (managed by the kernel).

Upvotes: 3

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