CODEWITHSUNDEEP
cassemblyinline-assemblypowerpc
Amit Singh Tomar
Amit Singh Tomar

Reputation: 8610

Decoding this assembly inline code snippet on PowerPc

I have this below code snippet from kernel source for PowerPc

#define SPRN_IVOR32     0x210   /* Interrupt Vector Offset Register 32 */

unsigned long ivor[3];
ivor[0] = mfspr(SPRN_IVOR32);

#define __stringify_1(x)        #x
#define __stringify(x)          __stringify_1(x)

#define mfspr(rn)       ({unsigned long rval; \
                    asm volatile("mfspr %0," __stringify(rn) \
                            : "=r" (rval)); rval; })

Also, it this above exercise is about emulating MSR register's bits in PowerPc?

Can anyone help me on what exactly we are doing here?

Upvotes: 3

Views: 871

Answers (1)

Jester
Jester

Reputation: 58762

The mfspr macro generates an asm instruction mfspr which reads the given special purpose register into a register chosen by the compiler, which then gets assigned to rval hence becomes the return value of the expression.

As the comment says, SPRN_IVOR32 is the Interrupt Vector Offset Register 32, whose contents are thus fetched into ivor[0].

Upvotes: 6

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