Reputation: 1737
I know this sounds like a stupid question, and it is. I'm trying to write a makefile, which builds and links against a static library that I'm writing (this is a unit testing framework). Basically I can't figure out where the working directory of the call to gcc is when I use make.
My directory structure looks like this:
./
|-> src
|-> include
|-> project
|-> Makefile
|-> test
|-> test.c, test.h
|-> project
|-> Makefile
So, if I go to the test/project directory and type the following command, I don't seem to have any problems
gcc -I../../include -I../../src ../test.c
But if I use a makefile with essentially the same configuration (makefile is below), then I get an error along the lines of:
gcc -o test ../test.c
In file included from ../test.c:7:0:
../test.h:8:24: fatal error: System.h: No such file or directory
#include "System.h"
(System.h is one of my header files located in the include/
directory).
So here's my question. Since I'm trying to use gcc to compile a file at a different relative path from the makefile, which has includes from a different relative path from itself, what is the proper way to do this with make? Should I change my working directory to the one that contains test.c, and include relative to that directory, or should I put relative paths to everything as if I called gcc from the directory of the makefile?
Here's my makefile
CC = gcc
CFLAGS = -Wall -std=c99 -static -I../../include -I../../src -L$(LIBTARGET) -lmystaticlib
TARGET_APP=test
LIBTARGET = ../../project
all : $(TARGET_APP)
$(TARGET_APP) : library
$(CC) ${CLAGS} -o $@ ../test.c
library :
$(MAKE) -C $(LIBTARGET)
Upvotes: 1
Views: 4732
Reputation: 44023
Replace ${CLAGS}
with $(CFLAGS)
(parens instead of brackets, fix typo in variable name) in the makefile. As it is now, the CFLAGS
variable in the makefile is not used. That is the reason that its contents don't show up in the compiler call, and that is the reason that ../../include
is not part of the compiler search path.
Other than that: Unless you did something to change it, the working directory of the compiler call is the directory from which you called make. You can test this by putting a makefile with the following contents:
all:
pwd
in a directory, say /home/user/foo/bar/Makefile
. Then:
$ cd /home/user/foo/bar
$ make
/home/user/foo/bar
$ cd ..
$ make -f bar/Makefile
/home/user/foo
Upvotes: 2