CODEWITHSUNDEEP
makefile
tearvisus
tearvisus

Reputation: 2033

make does not detect changes in source files

I have the following project structure:

ProjectDir
|           
+---CurrentDir
|       Makefile
|       
+---App1
|   |   Source1.cs
|   |   Source2.cs
|   |   
|
\---App2
    |   Source1.cs
    |   Source2.cs
    |

and I want to build all applications in the CurrentDir. The Makefile is as follows:

APPS=App1.exe App2.exe

all: $(APPS)

$(APPS) : %.exe : $(wildcard ../%/*.cs) 
    csc /nologo /out:$@ ..\\$(basename $@)\\*.cs

The applications build without any problems, but whenever I change something in one of the source files, make does not rebuild the binaries (Nothing to be done for 'all').

Why is that and how can I fix this? I guess it has something to do with the wildcard expression.

Upvotes: 0

Views: 2010

Answers (1)

Etan Reisner
Etan Reisner

Reputation: 80921

The $(wildcard) function is being evaluated at make parse time (when % isn't special) and is trying to glob ../%/*.cs which, naturally, isn't matching anything. To do what you want as you've written it you need to use Secondary Expansion

.SECONDEXPANSION:
$(APPS) : %.exe : $$(wildcard ../$$*/*.cs)

That being said doing this in stanges more manually might be more useful (but would require more rewriting of your makefile).

Upvotes: 2

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