CODEWITHSUNDEEP
assemblyarm
Sarvavyapi
Sarvavyapi

Reputation: 850

What do these ARM assembly instructions do?

I came across these ASM instructions recently and am trying to figure out what they do. I went through a few ARM assembly books (such as THIS) and was able to figure out what a couple of instructions do.

For instance, MRS (Move to Register from Status) copies status from the PSR (Program Status Register) register to %0 (which I believe is register 0).

I am not able to understand what : "=r" (Cs) and other similar instructions do.

UINT32 Cp;
if((Cp & 0x1) == 0)
{
   UINT32 Cs;
   __asm
   (
     " MRS %0, PSR\n"
     "BIC %1, %2, #0x80\n"
     "cpsie i"
           : "=r" (Cs), "=r" (Cp)
           : "r" (Cs)
   );
}

Can someone please explain?

Edit 1: This is inside a GlobalLock release function. cpsie i enables the interrupts.

Upvotes: 0

Views: 1169

Answers (2)

Useless
Useless

Reputation: 67713

That isn't (just) assembler, it's inline assembler embedded in C code. Presumably there's some context around this code, or where you found it, which should suggest this.

See, for example, the GCC Extended Asm docs.

This builtin emits the assembler (which you've already identified) in the middle of some C code, and also tells the compiler what the assembler did: specifically, which registers were used or damaged.

The last two lines indicate which variables are used in the assembler, and how they're affected

  1. "=r" (Cs) - the variable Cs is used as an output register, called %0 in the assembly code, and is overwritten
  2. "=r" (Cp) - the variable Cp is used as an output register, called %1 in the assembly code, and is overwritten
  3. "r" (Cs) - Cs is used as an input register, called %2 in the assembly code

Note that %0/1/2 are just the positions of the entries in the input/output list, starting from zero.

Upvotes: 4

TMN
TMN

Reputation: 3070

Those look like assembler directives. From the code you provided, it looks like you're trying to decipher the assembly language emitted by a compiler. Those "instructions" are likely telling the compiler back-end to emit opcodes appropriate to the target machine. This permits the front-end compiler to remain relatively simple, yet permit the compiler to emit (and optimize) specific instructions for particular targets.

Upvotes: 0

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