Reputation: 30102
I want to create a Makefile
that outputs foo
no matter what target name is given to make
.
So all of these should work:
$ make foo $ make a foo $ make foobar foo
The following Makefile
does almost what I want:
all %: @echo foo .PHONY: all
However it fails if there exists a file with the same name as the target:
$ touch abc $ make abc make: `abc' is up to date.
As .PHONY
doesn't accept pattern rules, I don't know how I can get make
to ignore every file.
Upvotes: 0
Views: 206
Reputation: 100856
How about:
all $(MAKECMDGOALS): ; @echo foo
.PHONY: all $(MAKECMDGOALS)
Upvotes: 2