Reputation: 2891
I have a directory full of c source files, each one could be compiled into a independent kernel module, the following Makefile doesn't work:
sources := $(wildcard *.c)
obj-m += $(patsubst %.c,%.o,$(sources))
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
But if I use obj-m += mod1.o mod2.o
this will work.
Upvotes: 2
Views: 354
Reputation: 5361
You can use the below snippet from makefile
obj-m += $(subst .c,.o, $(wildcard *.c))
subst
will replace .c
suffixes with .o
Upvotes: 1