Clark Gaebel
Clark Gaebel

Reputation: 17938

Make GNU make use a different compiler

How can I make GNU Make use a different compiler without manually editing the makefile?

Upvotes: 73

Views: 93373

Answers (6)

Multifix
Multifix

Reputation: 130

Makefile:

#!MAKE

suf=$(suffix $(src))
ifeq ($(suf), .c)
cc=gcc
else
ifeq ($(suf), .cpp)
cc=g++
endif
endif

all:
    $(cc) $(src) -o $(src:$(suf)=.exe)

clean:
    rm *.exe

.PHONY: all clean

Terminal:

$ make src=main.c

Upvotes: 0

ladenedge
ladenedge

Reputation: 13419

Many makefiles use 'CC' to define the compiler. If yours does, you can override that variable with

make CC='/usr/bin/gcc'

Upvotes: 12

Thomas Matthews
Thomas Matthews

Reputation: 57678

Use variables for the compiler program name.
Either pass the new definition to the make utility or set them in the environment before building.

See Using Variables in Make

Upvotes: 1

Rob Kennedy
Rob Kennedy

Reputation: 163247

If the makefile is written like most makefiles, then it uses $(CC) when it wishes to invoke the C compiler. That's what the built-in rules do, anyway. If you specify a different value for that variable, then Make will use that instead. You can provide a new value on the command line:

make CC=/usr/bin/special-cc

You can also specify that when you run configure:

./configure CC=/usr/bin/special-cc

The configuration script will incorporate the new CC value into the makefile that it generates, so you don't need to manually edit it, and you can just run make by itself thereafter (instead of giving the custom CC value on the command line every time).

Upvotes: 22

jonescb
jonescb

Reputation: 22751

You should be able to do something like this:

make CC=my_compiler

This is assuming whoever wrote the Makefile used the variable CC.

Upvotes: 101

Michael Mrozek
Michael Mrozek

Reputation: 175315

You can set the environment variables CC and CXX, which are used for compiling C and C++ files respectively. By default they use the values cc and g++

Upvotes: 31

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