CODEWITHSUNDEEP
assemblyx8664-bitx86-64machine-code
Ryan Brown
Ryan Brown

Reputation: 1095

x64 LAR instruction (Load Access Rights Byte)

This instruction has some confusing modes, here's the table for the 64-bit version on page 862 of the intel x64 manual:

Opcode    Instruction         Description
0F 02 /r  LAR r16, r16/m16    r16 ← access rights referenced by r16/m16
0F 02 /r  LAR reg, r32/m16    reg ← access rights referenced by r32/m16

What size register is that 'reg'? Is this an instruction that needs the 16-bit 66H prefix? Or a 67H or REX.W prefix maybe? I assume it needs a prefix because the op-codes are the same...

Upvotes: 2

Views: 652

Answers (1)

ElderBug
ElderBug

Reputation: 6145

The AMD documentation is a bit clearer about that :

LAR reg16, reg/mem16        0F 02 /r        ...
LAR reg32, reg/mem16        0F 02 /r        ...
LAR reg64, reg/mem16        0F 02 /r        ...

reg/mem16 : Word (16-bit) operand in a GPR register or memory.

And also :

In 64-bit mode, most instructions default to a 32-bit operand size. For these instructions, a REX prefix (page 14) can specify a 64-bit operand size, and a 66h prefix specifies a 16-bit operand size. The REX prefix takes precedence over the 66h prefix.

Quotes from AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions

Upvotes: 1

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