Reputation: 2894
I have written a make file for a program as under
Panther!simpleguy:~/Code [62]$ cat make.def
CC = gcc
LIBS = -lpthread
CODE_FILE = Code_In_C.c
EXECUTABLE = Code_In_C
all : ${CODE_FILE}
${CC} -o ${EXECUTABLE} ${LIBS} ${CODE_FILE}
I tried to make it using below command
Panther!simpleguy:~/Code [63]$ make all make.def
make: *** No rule to make target `all'. Stop.
Why is it not picking 'all' which is defined in make file (make.def) ?
Upvotes: 0
Views: 63
Reputation: 134326
As per the online GNU Make manual,
Normally you should call your makefile either
makefile
orMakefile
.
and
If you want to use a nonstandard name for your makefile, you can specify the makefile name with the
-f
or--file
option. The arguments-f name
or--file=name
tell make to read the filename
as the makefile.
So, you should use the following syntax to specify a makefile with nonstandard name
make -f make.def all
Upvotes: 2