Reputation: 927
I have 3 files which should included in static library (file1.c,file2.c,file3.c) and one file which should include the main function (main.c file) and linked to the static library.
I would like to create one makefile that create the library and then create the executable.
My base makefile is:
CC=gcc
CFLAGS=-c -Wall
LDFLAGS=
SOURCES=file1.c file2.c file3.c
OBJECTS=$(SOURCES:.c=.o)
OUT=libctest.a
EXECUTABLE=hello
LDFLAGS = -static
.c.o:
$(CC) $(CFLAGS) -c $< -o $@
$(OUT): $(OBJECTS)
ar rcs $(OUT) $(OBJECTS)
all:
(CC) -o $(EXECUTABLE) main.c $(OUT)
clean:
rm -f $(OBJECTS) $(OUT)
The library is created but the executable doesn't created (all: (CC) -o $(EXECUTABLE) main.c $(OUT)) Any idea what is needed?
Upvotes: 2
Views: 2082
Reputation: 15969
Make will by default process the first target in the Makefile
. In your case this is the .c.o
target. To make all
the default target move it to the top. Many people would prefer a style where all
won't do anything but rather depend on others. Something along those lines:
all: $(EXECUTABLE)
$(OUT): $(OBJECTS)
ar rcs $(OUT) $(OBJECTS)
$(EXECUTABLE): main.c $(OUT)
(CC) -o $(EXECUTABLE) main.c $(OUT)
Upvotes: 2