CODEWITHSUNDEEP
cmakefile
tarabyte
tarabyte

Reputation: 19172

How to force a full recompilation of all files for every make?

I'm hoping to create a basic makefile template for small-scale C apps. In this scenario, I'm less concerned with performance than clarity and want to recompile everything - All .h and .c files, and third-party .so files.

# Constants
#===============================================================================

# Specify the C complier
CC = gcc

# List the flags to pass to the compiler
#  -ggdb       Compile with debug information for gdb
#  -Wall       Give all diagnostic warnings
#  -O0         Do NOT optimize generated code
#  -m64        Generate code for a 64-bit environment
CFLAGS = -ggdb -Wall -O0 -m64

# Change the list of c source files into a list of object files by replacing
# the .c suffix with .o
OBJECTS := $(patsubst %.c,%.o,$(wildcard *.c))

# List libraries
# m    Math library
LIBRARIES = -lm

# Specify the build target
TARGET = heyyou

# Rules
#===============================================================================
# $@ = left side of the colon, the target
$(TARGET) : $(OBJECTS)
    @echo "Compiling $@..."
    $(CC) -o $(TARGET) $(OBJECTS) $(CFLAGS) $(LIBRARIES)

Upvotes: 2

Views: 4629

Answers (3)

Terko Jones
Terko Jones

Reputation: 11

you can indicate -B option in your make command line.

make -B

Upvotes: 1

LPs
LPs

Reputation: 16213

You can add a clean function in your makefile,eg:

clean:
    rm -rf *.o $(PRG).elf *.eps *.png *.pdf *.bak
    rm -rf *.lst *.map

In your case you can add also: 

rm -rf $(OBJECTS)

Then you simply call make clean before call make

Upvotes: 2

saurabh agarwal
saurabh agarwal

Reputation: 2184

If you have made Makefile properly considering all the decencies, simply use 

make clean

If you have made a proper Makefile, all dependencies will be handled automatically and for every change you make in your file system, you don't have to do "make clean" every time. A simple "make" would be enough.
If you have not handled all the dependencies in make, then you will notice that changes that make in your source code won't reflect in binaries. So a simple work around this would be to add these lines in you Makefile

clean:
    rm *.so
    rm *.o

Now, for every compilation, do something like 

make clean 
make

Its not a proper way to handle Makefile but its a saviour in some frustrating situation.

Upvotes: 3

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