Reputation: 6863
I am doing my own version of do_fork() (for many purposes). So, basically, I am copying the process from one place to another, possibly to another machine. Copying the code and pasting it here would be tough. But this explanation should good enough, I believe.
My code works most of the times, but in other times the function fpu_xrstor_checking()
returns an error (value = -1). Can anyone please explain what this function is supposed to do and extra commentary?
Here is the function pasted here for convenience:
45 static inline int fpu_xrstor_checking(struct fpu *fpu)
46 {
47 struct xsave_struct *fx = &fpu->state->xsave;
48 int err;
49
50 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
51 "2:\n"
52 ".section .fixup,\"ax\"\n"
53 "3: movl $-1,%[err]\n"
54 " jmp 2b\n"
55 ".previous\n"
56 _ASM_EXTABLE(1b, 3b)
57 : [err] "=r" (err)
58 : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "" (0)
59 : "memory");
60
61 return err;
62 }
Thank you!
Upvotes: 0
Views: 65
Reputation:
The inline assembly make use of a feature of Linux kernel that allow developer to "catch" CPU exceptions. The instruction at label 1
is a XRSTOR
(more on this later).
The code at label 3
is emitted in the .fixup
section that contain code used to handle exceptions.
The _ASM_EXTABLE
tell the assembler to generate a table structure to inform the kernel that the instruction at 1
may generate an exception and that its handler is at 3
.
The handler just set the err
to -1.
The XRSTOR
instruction (coded with opcodes maybe because the assembler does not support it yet?) restore the following part of the CPU architectural state: x87 (FPU), SSE, AVX.
The instruction take EDX:EAX as a mask (called the instruction mask) and it is quite elaborate, it can generate a #GP for a lot of reasons, listing them here would be pointless (one cause being its operand not aligned on 64 byte boundary).
When this instruction faults the function return -1.
I suggest the reading of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1 Section 13 for a full description of the topic (general understanding of Section 8-12 are required). You can also read the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2b for the instruction XRSTOR
reference with a full list of reasons for the exceptions that can be generated.
Upvotes: 2