K.H.A.J.A.S
K.H.A.J.A.S

Reputation: 516

Configuring FreeRTOS with GCC (ARM)

I am new to both RTOSs and ARM Cortex MCUs. I need to use FreeRTOS + GCC + mbed.org's library with STM32L053 nucleo board. I have successfully created a toolchain with GCC+mbed+qt-creator, but I need to add FreeRTOS to this combination. I already got a project which uses FreeRTOS with the same target, so I assume that I can use FreeRTOS files in that project in my files. But that project is build using different compiler and libraries. My doubts are:

 # This file was automagically generated by mbed.org. For more 

information, 
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded

GCC_BIN = /usr/bin/ PROJECT = Nucleo_printf OBJECTS = ./main.o  SYS_OBJECTS = ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_dac.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_comp.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_gpio.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_rcc_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_rng.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_rtc_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_iwdg.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_smartcard_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_lcd.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_adc.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_flash_ramfunc.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_rcc.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_comp_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_flash_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/mbed_overrides.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_cryp_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_i2c_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_smbus.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_tim_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_i2s.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_lptim.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_pwr.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_firewall.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_rtc.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_crc.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_flash.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_pwr_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_cortex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/system_stm32l0xx.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/board.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/startup_stm32l053xx.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_pcd_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_dma.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_wwdg.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_tsc.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_crc_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_spi.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/cmsis_nvic.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/hal_tick.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_adc_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_cryp.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_irda.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/retarget.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_pcd.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_dac_ex.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_uart.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_tim.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_usart.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_smartcard.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_i2c.o ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/stm32l0xx_hal_uart_ex.o  INCLUDE_PATHS = -I. -I./mbed -I./mbed/TARGET_NUCLEO_L053R8
-I./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM -I./mbed/TARGET_NUCLEO_L053R8/TARGET_STM -I./mbed/TARGET_NUCLEO_L053R8/TARGET_STM/TARGET_STM32L0 -I./mbed/TARGET_NUCLEO_L053R8/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8

LIBRARY_PATHS = -L./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM  LIBRARIES = -lmbed  LINKER_SCRIPT = ./mbed/TARGET_NUCLEO_L053R8/TOOLCHAIN_GCC_ARM/STM32L053X8.ld

###############################################################################  AS      = $(GCC_BIN)arm-none-eabi-as CC      = $(GCC_BIN)arm-none-eabi-gcc CPP     = $(GCC_BIN)arm-none-eabi-g++ LD  
= $(GCC_BIN)arm-none-eabi-gcc OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump SIZE    = $(GCC_BIN)arm-none-eabi-size



CPU = -mcpu=cortex-m0plus -mthumb  CC_FLAGS = $(CPU) -c -g -fno-common
-fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer -MMD -MP CC_SYMBOLS = -DTARGET_NUCLEO_L053R8 -DTARGET_M0P -DTARGET_CORTEX_M -DTARGET_STM -DTARGET_STM32L0 -DTARGET_STM32L053R8 -DTOOLCHAIN_GCC_ARM -DTOOLCHAIN_GCC -D__CORTEX_M0PLUS -DARM_MATH_CM0PLUS -DMBED_BUILD_TIMESTAMP=1435204562.85 -D__MBED__=1 -DTARGET_FF_ARDUINO -DTARGET_FF_MORPHO 

LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -Wl,--wrap,main
-Wl,-Map=$(PROJECT).map,--cref
#LD_FLAGS += -u _printf_float -u _scanf_float LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys


ifeq ($(DEBUG), 1)   CC_FLAGS += -DDEBUG -O0 else   CC_FLAGS +=
-DNDEBUG -Os endif

.PHONY: all clean lst size

all: $(PROJECT).bin $(PROJECT).hex size


clean:  rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)


.s.o:   $(AS) $(CPU) -o $@ $ $@

lst: $(PROJECT).lst

size: $(PROJECT).elf    $(SIZE) $(PROJECT).elf

DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
-include $(DEPS)

Upvotes: 1

Views: 3871

Answers (2)

OlivierM
OlivierM

Reputation: 244

I created an open-source firmware framework

https://github.com/labapart/polymcu that is based on newlib (libc-like).

It supports GCC and LLVM toolchain, baremetal/RTX/FreeRTOS environments, and the major MCU vendors (Freescale, Nordic, NXP, ST).

I created few examples (Baremetal, CMSIS RTOS, FreeRTOS, Generic USB HID)

https://github.com/labapart/polymcu/tree/master/Application/Examples that runs on all the dev boards I have got from various vendors.

I also added CMSIS RTOS API to FreeRTOS, so you can easily swap CMSIS based RTOS (such as ARM RTX and FreeRTOS).

Upvotes: -1

Richard
Richard

Reputation: 3246

I have successfully created a toolchain with GCC

What do you mean by that? I have been using GCC on various ARM architectures for more years than I would care to admit to (many of which are listed on the FreeRTOS website) and have never had to actually create a tool chain yet. Instead I have always just used pre-build GCC binaries. ARM themselves maintain a version of GCC that is (naturally) free for everybody and requires no configuration or building.

If you want a professional GCC toolchain with projects that target this board then consider Atollic's tools (Google them). If you want a free GCC toolchain with projects for lots of STM32 boards then consider the tools found on the openstm32.org website.

Or am I missing the point?

What are the things to consider for configuring a existing FreeRTOS port with my new compiler (in my case GCC).

There are very few FreeRTOS configuration options that are compiler dependent. configMINIMAL_STACK_SIZE is probably one of them, as depending on the GCC libraries used, the stack allocated to tasks might need to be larger than when, for example, using the IAR compiler. There are however quite a few configuration options that are architecture dependent. For example, when using a Cortex-M device you need to specify how many priority bits are implemented in the part, the maximum interrupt priority from which system calls can be made, etc. The easiest way to set these up is to start with an existing project for an STM32 part - either from the FreeRTOS distribution, or from a tools company (such as the two already mentioned above).

Did mbed libraries have any effect on configuring FreeRTOS

I am not familiar with the mbed libraries, but things to look out for are how they enable and disable interrupts (FreeRTOS never globally disables interrupts on that architecture, but does keep a mask nesting count which could get messed up if the libraries are also manipulating the interrupt mask), and how it uses the SysTick interrupt if at all (by default FreeRTOS uses the SysTick to generate the RTOS tick interrupt).

Upvotes: 2

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