CODEWITHSUNDEEP
makefile
Waleed A
Waleed A

Reputation: 105

I want to generate objects in subdirectory by makefile

How to specify a subdirectory for the generated .o files, e.g. objsdir, for this code in the make file

cc = gcc
CFLAGS = -o6 -Wall
LIBS = -lm

SOURCES = main.c\
          extra.c
OBJECTS = $(SOURCES: .c = .o)
.c.o :; $(cc) -c $(CFLAGS) $<
all : $(OBJECT) 
      $(cc) -o ...

Actually this is a part of the mkefile code.

Upvotes: 1

Views: 210

Answers (2)

Waleed A
Waleed A

Reputation: 105

I actually use this Makefile in general 

CC := g++ # This is the main compiler
SRCDIR := src
BUILDDIR := build
TARGETDIR :=bin/
TARGET := pddlcrate
DATADIR := data 
SRCEXT := cpp
SOURCES := $(shell find $(SRCDIR) -type f -name *.$(SRCEXT))
OBJECTS := $(patsubst $(SRCDIR)/%,$(BUILDDIR)/%,$(SOURCES:.$(SRCEXT)=.o))
CFLAGS := -g # -Wall
#LIB := -pthread -lmongoclient -L lib -lboost_thread-mt -lboost_filesystem-      
mt -lboost_system-mt
INC := -I include

$(TARGET): $(OBJECTS)
    @echo " Linking..."
    @echo " $(CC) $^ -o $(TARGETDIR)$(TARGET) $(LIB)"; $(CC) $^ -o     
$(TARGETDIR)$(TARGET) $(LIB)

$(BUILDDIR)/%.o: $(SRCDIR)/%.$(SRCEXT)
    @mkdir -p $(BUILDDIR)
    @echo " $(CC) $(CFLAGS) $(INC) -c -o $@ $<"; $(CC) $(CFLAGS) $(INC) -c -  o $@ $<

clean:
    @echo " Cleaning..."; 
    @echo " $(RM) -r $(BUILDDIR) $(TARGET)"; $(RM) -r $(BUILDDIR) $(TARGET)

for any c++ project with this tree structure

$ tree .
├── Makefile
├── bin
    >exefile
├── include
   > *.h   files
├── obj
   > *.o files
├── src
    >*.cpp

Upvotes: 0

DGKarlsson
DGKarlsson

Reputation: 1101

I usually use something like this:

cc=gcc

SOURCES=main.c extra.c
OBJECTS=$(patsubst %.c, objsdir/%.o, $(SOURCES))

objsdir/%.o: %.c
        echo $^

all: $(OBJECTS)
        echo $(OBJECTS)

Upvotes: 2

Related Questions