barrt051
barrt051

Reputation: 242

C++ File Requires Library Support

I'm trying to compile a simple program from the terminal that utilizes the condition_variable class. Upon building, I get the following error:

This file requires compiler and library support for the ISO C++ 2011 standard. This support is currently experimental, and must be enabled with the -std=c++11 or -std=gnu++11 compiler options.

In researching this error here, I added the necessary flag to my make file, but I'm still getting the same error.

Here is my makefile:

CXX=        g++ $(CCFLAGS)
MAIN=       main.o
DATACLASS=  dataclass.o
OBJS =      $(MAIN) $(DATACLASS)

LIBS=       -pthread

CCFLAGS=    -g -std=c++11

all:        main

main:       $(MAIN) $(DATACLASS)
    $(CXX) -o main $(MAIN) $(DATACLASS) $(LIBS)

dataclass:  $(DATACLASS)
    $(CXX) -o dataclass $(DATACLASS) $(LIBS)

clean:
    rm -f $(OBJS) $(OBJS:.o=.d)

realclean:
    rm -f $(OBJS) $(OBJS:.o=.d) main


%.d:    %.cc
$(SHELL) -ec '$(CC) -M $(CPPFLAGS) $< \
    | sed '\''s/\($*\)\.o[ :]*/\1.o $@ : /g'\'' > $@; \
    [ -s $@ ] || rm -f $@'

include $(OBJS:.o=.d)

I'm sure I'm missing something small and stupid as I'm new to makefiles, but any help would be greatly appreciated.

Upvotes: 0

Views: 405

Answers (1)

IKavanagh
IKavanagh

Reputation: 6187

  1. Rewrite CXX to CXX = g++
  2. Change CCFLAGS to CXXFLAGS = -g -std=c++11, and
  3. Rewrite your rules to $(CXX) $(CXXFLAGS) ....

$(CXX) $(CXXFLAGS) will then be replaced with g++ -g -std=c++11. This is more of a standard method for defining a makefile. Here is a snippet of the resulting makefile.

CXX = g++
MAIN = main.o
DATACLASS = dataclass.o
OBJS = $(MAIN) $(DATACLASS)

LIBS = -pthread

CXXFLAGS = -g -std=c++11

all: main

main: $(OBJS)
    $(CXX) $(CXXFLAGS) $? -o $@ $(LIBS)

As a side note, are you sure this rule should be defined as such?

dataclass: $(DATACLASS)
    $(CXX) $(CXXFLAGS) $? -o $@ $(LIBS)

Should the target not be dataclass.o or $(DATACLASS) and the prerequisite some other file?


Note: I've also included some make automatic variables to tidy up the makefile rules.

  • $? - is replaced by all prerequisites
  • $@ - is replaced by the target name

Upvotes: 2

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