Reputation: 381
The opcodes for both movzbw and movzbl are OF B6
. I don't understand how they can be distinguished by observing the ModR/M byte. From the Intel 80386 Programmer's Reference Manual (1986):
MOVZX ── Move with Zero-Extend Opcode Instruction Clocks Description 0F B6 /r MOVZX r16,r/m8 3/6 Move byte to word with zero-extend 0F B6 /r MOVZX r32,r/m8 3/6 Move byte to dword, zero-extend 0F B7 /r MOVZX r32,r/m16 3/6 Move word to dword, zero-extend
How does the processor distinguish between and movzbw and movzbl?
Upvotes: 4
Views: 445
Reputation: 16126
Looks like it uses a prefix byte:
66 0f b6 c0 movzx ax,al
0f b6 c0 movzx eax,al
0f b7 c0 movzx eax,ax
Edit: note, in 64-bit mode, the above is the same but there is another prefix:
48 0f b6 c0 movzx rax,al
48 0f b7 c0 movzx rax,ax
Note that there is no movzx rax, eax
instruction.
(I'm an utter novice at this so I can't explain exactly why, I just throw code at the compiler and see if it's accepted).
Upvotes: 4
Reputation: 62096
Have a look at the operand size prefix, 66H. It toggles the operand size between 16 and 32 bits.
Upvotes: 3