CODEWITHSUNDEEP
makefile
Scam2315
Scam2315

Reputation: 3

Makefile - How to target all matching files?

    CC = g++49

#General Flags
CFLAGS =

#debug flags
CFLAGS +=

#Target Liker Flags
CFLAGS +=


TARGET  = ../game

INCDIR += -I
LIBDIR += -L
LIBS += -l


##############################################

INCDIR += -I
LIBDIR += -L
LIBS += -l  
##############################################
CPP_FILE =


OBJDIR =../../Object's
CPPOBJS = $(CPP_FILE:%.cpp=$(OBJDIR)/%.o)

default: $(TARGET)

$(OBJDIR)/%.o: %.cpp
    @echo compile $<
    @$(CC) $(CFLAGS) $(INCDIR) -c $< -o $@

$(TARGET): $(CPPOBJS)
    @echo linking....
    @$(CC) $(CFLAGS) $(LIBDIR) $(CPPOBJS) $(LIBS) -o $(TARGET)

Soo this si my makefile . I want to find all .cpp files and compile. Without their full name specified in CPP_FILE Example : CPP_FILE : test.cpp main.cpp slow.cpp scan.cpp

I want something like CPP_FILE = *.cpp

It is this possible?

Upvotes: 0

Views: 34

Answers (1)

Matt O
Matt O

Reputation: 1346

Make provides a wildcard function for this very purpose.

CPP_FILE = $(wildcard my_dir/*.cpp)

Upvotes: 1

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